Embedded System Events

• Embedded system events are moments when a piece of hardware directly accesses the central processing unit in a computer system. When an event occurs, the hardware sends a signal to the processor and halts whatever current process it is handling. Unplanned events, known as exceptions, are such things as sudden disconnections of data or application errors. Planned events, also known as interrupts, are caused deliberately by a user. Mouse clicks and the insertion of new devices are considered interrupts.
  
  

Hardware Interrupt Handling

• The advanced RISC machine (ARM) chip of a processor has a specific pin for accepting interrupt signals. RISC stands for reduced instruction set computer, stating that the chip contains a limited number of instructions for handling specific tasks. When an interrupt source on a piece of hardware detects an interrupt, it sends an electrical signal to the interrupt request (IRQ) pin. The IRQ pin turns HIGH when it receives an interrupt signal, notifying the processor to finish its current instruction, pause the current process and analyze the interrupt. When the interrupt has been handled, the processor resumes its previous process.
  
  

Interrupt Acknowledge Cycle

• When a piece of hardware signals for an interrupt, the processor begins the interrupt acknowledge cycle. The cycle is a conversation between the processor and hardware to relay the reason for the interrupt and locate the necessary solution. The processor sends a signal to the hardware asking for the interrupt reasoning. The hardware returns a vector number that the processor uses to locate the proper vector. Within the vector is the interrupt service routine (ISR) that will process the interrupt as necessary. For example, pressing the "P" key points to an ISR routine for entering the character P into an application.
  
  

Types of Interrupt Handlers

• The four major types of interrupt handlers include non-nested, nested, re-entrant nested and prioritized. A non-nested interrupt handler will only process one interrupt at a time and will ignore additional interrupt signals. Nested interrupt handlers allow for interrupts to occur while an interrupt is being processed. The current interrupt is halted like the previous processes and the new interrupt is handled first. Prioritized interrupt handlers will only halt an interrupt process if the new interrupt has an equal or higher priority rating. Re-entrant interrupt handlers act similarly to nested handlers, but reactivate the interrupt handling quicker after an interrupt has first occurred. This reduces lag time between interrupts but can cause several other errors.